[Linux-stm32] [PATCH net-next 1/2] dt-bindings: net: Add Siflower SF19A2890 GMAC

[Andrew Lunn]

On Wed, Nov 04, 2026 at 05:16:14PM -0500, Joseph Telaak wrote:
> > Please add minimum, and multipleOf.
> >
> > I've not looked at the code yet, but default: 0 would also be good.
> 
> Will do: minimum 0, multipleOf 55 and default 0.
> 
> > These values are odd. The RGMII standard says 2ns is required. Where
> > is the rest coming from.
> 
> They are the values the vendor bootloader programs, and I checked them
> against the hardware. Sweeping each delay over its 256 steps at
> 1000 Mb/s, TX works from 0 to about 2.8 ns and RX from 0 to about
> 1.5 ns; 935 and 550 ps sit inside both windows, and a 2 ns RX delay in
> the MAC fails.
> 
> The rest of the skew is not programmed anywhere: the switch's PCDU
> register for this port reads back 0, and with the MAC's delays at 0 as
> well the link still passes traffic. So it comes from the board routing
> or the chips themselves, which I can't separate from software.

Do you have access to another board which has a PHY connected, not a
switch?

There are unexplained delays here. Is it the switch, this MAC, or the
PCB?

We need to understand if tx-internal-delay 0 really means 0, or it
actually means 1065ps.

Just because it works does not mean it is correct. We could be in a
two wrongs makes a right situation, and as soon is it is a different
device on the other end, it all falls apart.

       Andrew