[Linux-stm32] [PATCH net-next v9 1/3] net: stmmac: dwmac-socfpga: complete cross-timestamp on ATSNS
Zxyan Zhu
zxyan0222 at gmail.com
Wed Nov 4 13:50:28 CET 2026
The Agilex5 smtg_crosststamp() handler polls XGMAC_INT_STATUS for TSIS
to learn that the auxiliary snapshot is latched. TSIS is a transient,
read-to-clear status bit, so the poll is racy in two ways: a stale TSIS
from an unrelated event satisfies it before the snapshot is latched,
leaving *device unwritten while the call reports success, and a
concurrent reader of XGMAC_TIMESTAMP_STATUS can clear it and make the
poll time out.
The FIFO level is also reported by the ATSNS count in
XGMAC_TIMESTAMP_STATUS, which reading the register does not disturb.
Poll ATSNS instead of TSIS, after waiting for the PTP_ACR_ATSFC FIFO
clear, so a stale ATSNS cannot satisfy the poll before the new snapshot
is latched.
Hold aux_ts_lock across the whole sequence, and refuse the request
with -EBUSY while a channel is enabled, so the PTP_ACR mask
programming cannot disarm it and a concurrent request cannot flush the
FIFO between the poll and the drain loop. The lock is held across the
SMTG register reads as well, so a concurrent PTP_SYS_OFFSET_PRECISE
cannot retrigger GPO0 while they run. The internal snapshot trigger
is disarmed on the way out, including the error paths, so it does not
stay armed in PTP_ACR after the cross-timestamp.
Fixes: fd8c4f645496 ("net: stmmac: socfpga: Add hardware supported cross-timestamp")
Cc: stable at vger.kernel.org
Signed-off-by: Zxyan Zhu <zxyan0222 at gmail.com>
---
.../ethernet/stmicro/stmmac/dwmac-socfpga.c | 52 +++++++++++++++----
1 file changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 6d4bc1fe8f75..2d3c6702e203 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -304,13 +304,15 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
int i, ret;
u32 v;
+ mutex_lock(&priv->aux_ts_lock);
/* Both internal crosstimestamping and external triggered event
- * timestamping cannot be run concurrently.
+ * timestamping cannot be run concurrently: the PTP_ACR mask
+ * programming below would disarm an external channel.
*/
- if (priv->plat->flags & STMMAC_FLAG_EXT_SNAPSHOT_EN)
+ if (priv->plat->flags & STMMAC_FLAG_EXT_SNAPSHOT_EN) {
+ mutex_unlock(&priv->aux_ts_lock);
return -EBUSY;
-
- mutex_lock(&priv->aux_ts_lock);
+ }
/* Enable Internal snapshot trigger */
acr_value = readl(ptpaddr + PTP_ACR);
acr_value &= ~PTP_ACR_MASK;
@@ -337,8 +339,21 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
acr_value = readl(ptpaddr + PTP_ACR);
acr_value |= PTP_ACR_ATSFC;
writel(acr_value, ptpaddr + PTP_ACR);
- /* Release the mutex */
- mutex_unlock(&priv->aux_ts_lock);
+
+ /* Wait for the FIFO clear, so the poll only sees snapshots from
+ * this trigger.
+ */
+ ret = readl_poll_timeout(ptpaddr + PTP_ACR, acr_value,
+ !(acr_value & PTP_ACR_ATSFC), 10, 10000);
+ if (ret) {
+ acr_value = readl(ptpaddr + PTP_ACR);
+ acr_value &= ~PTP_ACR_MASK;
+ writel(acr_value, ptpaddr + PTP_ACR);
+ mutex_unlock(&priv->aux_ts_lock);
+ netdev_err(priv->dev, "%s: Failed to clear snapshot FIFO\n",
+ __func__);
+ return ret;
+ }
/* Trigger Internal snapshot signal. Create a rising edge by just toggle
* the GPO0 to low and back to high.
@@ -349,10 +364,17 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
gpio_value |= XGMAC_GPIO_GPO0;
writel(gpio_value, ioaddr + XGMAC_GPIO_STATUS);
- /* Poll for time sync operation done */
- ret = readl_poll_timeout(priv->ioaddr + XGMAC_INT_STATUS, v,
- (v & XGMAC_INT_TSIS), 100, 10000);
+ /* Poll ATSNS instead of the transient TSIS: the ATSNS count is
+ * the FIFO level and is not cleared by reading the register.
+ */
+ ret = readl_poll_timeout(ioaddr + XGMAC_TIMESTAMP_STATUS, v,
+ FIELD_GET(XGMAC_TIMESTAMP_ATSNS_MASK, v),
+ 100, 10000);
if (ret) {
+ acr_value = readl(ptpaddr + PTP_ACR);
+ acr_value &= ~PTP_ACR_MASK;
+ writel(acr_value, ptpaddr + PTP_ACR);
+ mutex_unlock(&priv->aux_ts_lock);
netdev_err(priv->dev, "%s: Wait for time sync operation timeout\n",
__func__);
return ret;
@@ -364,8 +386,7 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
.use_nsecs = false,
};
- num_snapshot = FIELD_GET(XGMAC_TIMESTAMP_ATSNS_MASK,
- readl(ioaddr + XGMAC_TIMESTAMP_STATUS));
+ num_snapshot = FIELD_GET(XGMAC_TIMESTAMP_ATSNS_MASK, v);
/* Repeat until the timestamps are from the FIFO last segment */
for (i = 0; i < num_snapshot; i++) {
@@ -375,9 +396,18 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system,
read_unlock_irqrestore(&priv->ptp_lock, flags);
}
+ /* Disarm the internal snapshot trigger, so the PTP_ACR mask does
+ * not stay armed behind the software state.
+ */
+ acr_value = readl(ptpaddr + PTP_ACR);
+ acr_value &= ~PTP_ACR_MASK;
+ writel(acr_value, ptpaddr + PTP_ACR);
+
get_smtgtime(priv->mii, SMTG_MDIO_ADDR, &smtg_time);
system->cycles = smtg_time;
+ mutex_unlock(&priv->aux_ts_lock);
+
return 0;
}
--
2.34.1
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