[Linux-stm32] STM32MP1 level triggered interrupts

[Alexandre Torgue]

On 1/21/20 6:21 PM, Marc Zyngier wrote:
> On 2020-01-21 17:12, Alexandre Torgue wrote:
>> Hi Marek,
>>
>> On 1/20/20 7:32 PM, Marek Vasut wrote:
>>> Hi,
>>>
>>> I have a device connected to STM32MP157C which requires active-low
>>> level-triggered interrupt sink. The device interrupt line is connected
>>> to the SoC gpio-C bank, which has it's interrupt line routed into EXTI,
>>> which can only handle edge triggered interrupts to my understanding.
>>
>> correct.
>>
>>>
>>> However, ARM GIC should be able to do both and EXTI has this irqmux /
>>> EXTImux functionality, which -- if my understanding is correct -- is
>>> capable of routing a select GPIO line directly into the GIC as an EXTIn
>>> interrupt signal. Thus, this might permit handling active low
>>> level-triggered interrupts. Is there some DT binding to configure 
>>> this yet ?
>>>
>>> Or is there some other, better, way ?
>>>
>>
>> For SPIs, GIC controller handles rising edge triggered interrupt and
>> active high level-sensitive. GIC integration in STM32MP157c makes that
>> only active high level-sensitive configuration for SPI interrupts is
>> supported.
> 
> This statement is a slight exaggeration. *any* GIC will happily service
> rising-edge triggered SPIs, as it is mandated by the spec. What I suspect
> is that there is no SPI that is routed out of the SoC for anyone to 
> directly
> plug anything into it.

Yes correct. No SPI are routed out of the SoC. External interruptions 
are mapped to Exti. Exti is then routed to the GIC with other signals.

Regards
Alex

> 
>           M.