[Linux-stm32] [PATCH V4 00/22] ARM: dts: stm32: Repair AV96 board

Manivannan Sadhasivam manivannan.sadhasivam at linaro.org
Fri Apr 10 09:00:24 UTC 2020


Hi,

On Tue, Apr 07, 2020 at 05:32:31PM +0200, Marek Vasut wrote:
> On 4/6/20 9:27 AM, Manivannan Sadhasivam wrote:
> > Hi,
> 
> Hi,
> 
> > On Wed, Apr 01, 2020 at 03:22:15PM +0200, Marek Vasut wrote:
> >> The AV96 board device tree is completely broken and does not match the
> >> hardware. This series fixes it up.
> >>
> >> Marek Vasut (22):
> >>   ARM: dts: stm32: Add alternate pinmux for ethernet RGMII
> >>   ARM: dts: stm32: Repair ethernet operation on AV96
> >>   ARM: dts: stm32: Add missing ethernet PHY reset on AV96
> >>   ARM: dts: stm32: Add missing ethernet PHY skews on AV96
> > 
> > Ethernet works fine with cold boot but after warm reboot it fails with below
> > message,
> > 
> > [   18.192842] stm32-dwmac 5800a000.ethernet eth0: no phy at addr -1
> > [   18.197539] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Cannot attach to PHY (err)
> 
> Try this patch:
> 

[   17.270826] stm32-dwmac 5800a000.ethernet eth0: no phy at addr -1
[   17.275519] stm32-dwmac 5800a000.ethernet eth0: stmmac_open: Cannot attach to PHY (err)

It doesn't work. Sorry, I don't have much time to dig into this issue so
I'll leave it up to you :)

Thanks,
Mani

> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> index 9fcc15b6e76d..3387d6353418 100644
> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> @@ -136,12 +136,14 @@ &ethernet0 {
>         phy-mode = "rgmii";
>         max-speed = <1000>;
>         phy-handle = <&phy0>;
> -       phy-reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> 
>         mdio0 {
>                 #address-cells = <1>;
>                 #size-cells = <0>;
>                 compatible = "snps,dwmac-mdio";
> +               reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> +               reset-delay-us = <1000>;
> +
>                 phy0: ethernet-phy at 7 {
>                         reg = <7>;



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