<html><head><meta http-equiv="Content-Type" content="text/html; charset=utf-8" /></head><body><div>From 553c09cfa84fa801fbd8dcd5c9ae96e94a54ee31 Mon Sep 17 00:00:00 2001<div dir="ltr" style="mso-line-height-rule:exactly;-webkit-text-size-adjust:100%;font-size:1px;direction:ltr;"><table dir="ltr" cellpadding="0" cellspacing="0" border="0" style="width:100%;direction:ltr;border-collapse:collapse;font-size:1px;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="padding:10px 0;vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;line-height:normal;"><tr style="font-size:0;"><td align="left" style="padding:0 10px 0 0;vertical-align:middle;"><a href="https://www.arrow.com/" target="_blank" id="LPlnk689713" style="text-decoration:none;"><img src="cid:image936329.png@0C50D27C.A5E46946" width="100" height="46" border="0" title="Arrow Logo" alt="Arrow Logo" style="width:100px;min-width:100px;max-width:100px;height:46px;min-height:46px;max-height:46px;font-size:12px;" /></a></td><td align="left" style="padding:0 0 0 10px;border-top:none;border-right:none;border-bottom:none;border-left:solid 1px #000001;vertical-align:middle;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="padding:0 0 0 5px;vertical-align:middle;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;color:#000001;font-style:italic;font-weight:400;white-space:normal;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;color:#000001;font-style:normal;font-weight:700;white-space:nowrap;"><tr style="font-size:13.33px;"><td align="left" style="padding:1px 0 0;vertical-align:top;font-family:Arial;">Tomasz Merta</td></tr></table></td><td><span style="font-family:remialcxesans;font-size:1px;color:#FFFFFF;line-height:1px;"><span style="font-family:'template-yWcA0IdBEe-EcwAiSCkyTw';"></span><span style="font-family:'zone-1';"></span><span style="font-family:'zones-AQ';"></span></span></td></tr></table></td></tr><tr style="font-size:13.33px;"><td align="left" style="vertical-align:top;font-family:Arial;">Software Engineer</td></tr><tr style="font-size:13.33px;font-style:normal;font-weight:700;white-space:nowrap;"><td align="left" style="vertical-align:top;font-family:Arial;"><a href="mailto:Tomasz.Merta@arrow.com" target="_blank" id="LPlnk689713" style="text-decoration:none;color:#000001;">E: <span style="font-weight:400;">Tomasz.Merta@arrow.com</span></a><br /></td></tr></table></td></tr><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;color:#000001;font-style:normal;font-weight:400;white-space:nowrap;"><tr style="font-size:13.33px;"><td align="left" style="vertical-align:top;font-family:Arial;font-weight:700;">Arrow Electronics</td><td align="left" style="vertical-align:top;font-family:Arial;"> | </td><td align="left" style="vertical-align:top;font-family:Arial;"><a href="https://www.arrow.com/" target="_blank" id="LPlnk689713" style="text-decoration:none;color:#000001;">arrow.com</a></td></tr></table></td></tr></table></td></tr></table></td></tr></table></td></tr></table></td></tr></table></div><br />From: Tomasz Merta <tomasz.merta@arrow.com><br />Date: Fri, 3 Apr 2026 10:33:11 +0200<br />Subject: [PATCH] Subject: ASoC stm32_sai: fix incorrect BCLK polarity for<br />DSP_A/B, LEFT_J<br /><br />The STM32 SAI driver do not set the clock strobing bit (CKSTR) for DSP_A,<br />DSP_B and LEFT_J formats, causing data to be sampled on the wrong BCLK<br />edge when SND_SOC_DAIFMT_NB_NF is used.<br /><br />Per ALSA convention, NB_NF requires sampling on the rising BCLK edge.<br />The STM32MP25 SAI reference manual states that CKSTR=1 is required for<br />signals received by the SAI to be sampled on the SCK rising edge.<br />Without setting CKSTR=1, the SAI samples on the falling edge, violating<br />the NB_NF convention. For comparison, the NXP FSL SAI driver correctly<br />sets FSL_SAI_CR2_BCP for DSP_A, DSP_B and LEFT_J, consistent with its<br />I2S handling.<br /><br />This patch adds SAI_XCR1_CKSTR for DSP_A, DSP_B and LEFT_J in<br />stm32_sai_set_dai_fmt which was verified empirically with a cs47l35 codec.<br />RIGHT_J (LSB) is not investigated and addressed by this patch.<br /><br />Note: the STM32 I2S driver (stm32_i2s_set_dai_fmt) may have the same issue<br />for DSP_A mode, as I2S_CGFR_CKPOL is not set. This has not been verified<br />and is left for a separate investigation.<br /><br />Signed-off-by: Tomasz Merta <tomasz.merta@arrow.com><br />---<br /> sound/soc/stm/stm32_sai_sub.c | 3 +++<br /> 1 file changed, 3 insertions(+)<br /><br />diff --git a/sound/soc/stm/stm32_sai_sub.c b/sound/soc/stm/stm32_sai_sub.c<br />index 450e1585edee..3e82fa90e719 100644<br />--- a/sound/soc/stm/stm32_sai_sub.c<br />+++ b/sound/soc/stm/stm32_sai_sub.c<br />@@ -802,6 +802,7 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)<br /> break;<br /> /* Left justified */<br /> case SND_SOC_DAIFMT_MSB:<br />+ cr1 |= SAI_XCR1_CKSTR;<br /> frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF;<br /> break;<br /> /* Right justified */<br />@@ -809,9 +810,11 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)<br /> frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF;<br /> break;<br /> case SND_SOC_DAIFMT_DSP_A:<br />+ cr1 |= SAI_XCR1_CKSTR;<br /> frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSOFF;<br /> break;<br /> case SND_SOC_DAIFMT_DSP_B:<br />+ cr1 |= SAI_XCR1_CKSTR;<br /> frcr |= SAI_XFRCR_FSPOL;<br /> break;<br /> default:<br />-- <br />2.34.1<br /><br /></div></body></html>