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From 553c09cfa84fa801fbd8dcd5c9ae96e94a54ee31 Mon Sep 17 00:00:00 2001</div>
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<div dir="ltr" style="mso-line-height-rule:exactly;-webkit-text-size-adjust:100%;font-size:1px;direction:ltr;"><table dir="ltr" cellpadding="0" cellspacing="0" border="0" style="width:100%;direction:ltr;border-collapse:collapse;font-size:1px;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="padding:10px 0;vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;line-height:normal;"><tr style="font-size:0;"><td align="left" style="padding:0 10px 0 0;vertical-align:middle;"><a href="https://www.arrow.com/" target="_blank" id="LPlnk689713" style="text-decoration:none;"><img src="cid:image272196.png@E8318466.B03EE187" width="100" height="46" border="0" title="Arrow Logo" alt="Arrow Logo" style="width:100px;min-width:100px;max-width:100px;height:46px;min-height:46px;max-height:46px;font-size:12px;" /></a></td><td align="left" style="padding:0 0 0 10px;border-top:none;border-right:none;border-bottom:none;border-left:solid 1px #000001;vertical-align:middle;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="padding:0 0 0 5px;vertical-align:middle;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="width:100%;border-collapse:collapse;font-size:0;color:#000001;font-style:italic;font-weight:400;white-space:normal;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;"><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;color:#000001;font-style:normal;font-weight:700;white-space:nowrap;"><tr style="font-size:13.33px;"><td align="left" style="padding:1px 0 0;vertical-align:top;font-family:Arial;">Tomasz Merta</td></tr></table></td><td><span style="font-family:remialcxesans;font-size:1px;color:#FFFFFF;line-height:1px;"><span style="font-family:'template-yWcA0IdBEe-EcwAiSCkyTw';"></span><span style="font-family:'zone-1';"></span><span style="font-family:'zones-AQ';"></span></span></td></tr></table></td></tr><tr style="font-size:13.33px;"><td align="left" style="vertical-align:top;font-family:Arial;">Software Engineer</td></tr><tr style="font-size:13.33px;font-style:normal;font-weight:700;white-space:nowrap;"><td align="left" style="vertical-align:top;font-family:Arial;"><a href="mailto:Tomasz.Merta@arrow.com" target="_blank" id="LPlnk689713" style="text-decoration:none;color:#000001;">E: <span style="font-weight:400;">Tomasz.Merta@arrow.com</span></a><br /></td></tr></table></td></tr><tr style="font-size:0;"><td align="left" style="vertical-align:top;"><table cellpadding="0" cellspacing="0" border="0" style="border-collapse:collapse;font-size:0;color:#000001;font-style:normal;font-weight:400;white-space:nowrap;"><tr style="font-size:13.33px;"><td align="left" style="vertical-align:top;font-family:Arial;font-weight:700;">Arrow Electronics</td><td align="left" style="vertical-align:top;font-family:Arial;"> | </td><td align="left" style="vertical-align:top;font-family:Arial;"><a href="https://www.arrow.com/" target="_blank" id="LPlnk689713" style="text-decoration:none;color:#000001;">arrow.com</a></td></tr></table></td></tr></table></td></tr></table></td></tr></table></td></tr></table></td></tr></table></div>From: Tomasz Merta <tomasz.merta@arrow.com></div>
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Date: Fri, 3 Apr 2026 10:33:11 +0200</div>
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Subject: [PATCH] Subject: ASoC stm32_sai: fix incorrect BCLK polarity for</div>
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DSP_A/B, LEFT_J</div>
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<br>
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The STM32 SAI driver do not set the clock strobing bit (CKSTR) for DSP_A,</div>
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DSP_B and LEFT_J formats, causing data to be sampled on the wrong BCLK</div>
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edge when SND_SOC_DAIFMT_NB_NF is used.</div>
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<br>
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Per ALSA convention, NB_NF requires sampling on the rising BCLK edge.</div>
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The STM32MP25 SAI reference manual states that CKSTR=1 is required for</div>
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signals received by the SAI to be sampled on the SCK rising edge.</div>
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Without setting CKSTR=1, the SAI samples on the falling edge, violating</div>
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the NB_NF convention. For comparison, the NXP FSL SAI driver correctly</div>
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sets FSL_SAI_CR2_BCP for DSP_A, DSP_B and LEFT_J, consistent with its</div>
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I2S handling.</div>
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<br>
</div>
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This patch adds SAI_XCR1_CKSTR for DSP_A, DSP_B and LEFT_J in</div>
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stm32_sai_set_dai_fmt which was verified empirically with a cs47l35 codec.</div>
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RIGHT_J (LSB) is not investigated and addressed by this patch.</div>
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<br>
</div>
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Note: the STM32 I2S driver (stm32_i2s_set_dai_fmt) may have the same issue</div>
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for DSP_A mode, as I2S_CGFR_CKPOL is not set. This has not been verified</div>
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and is left for a separate investigation.</div>
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<br>
</div>
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Signed-off-by: Tomasz Merta <tomasz.merta@arrow.com></div>
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---</div>
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sound/soc/stm/stm32_sai_sub.c | 3 +++</div>
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1 file changed, 3 insertions(+)</div>
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<br>
</div>
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diff --git a/sound/soc/stm/stm32_sai_sub.c b/sound/soc/stm/stm32_sai_sub.c</div>
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index 450e1585edee..3e82fa90e719 100644</div>
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--- a/sound/soc/stm/stm32_sai_sub.c</div>
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+++ b/sound/soc/stm/stm32_sai_sub.c</div>
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@@ -802,6 +802,7 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)</div>
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break;</div>
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/* Left justified */</div>
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case SND_SOC_DAIFMT_MSB:</div>
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+ cr1 |= SAI_XCR1_CKSTR;</div>
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frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF;</div>
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break;</div>
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/* Right justified */</div>
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@@ -809,9 +810,11 @@ static int stm32_sai_set_dai_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)</div>
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frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSDEF;</div>
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break;</div>
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case SND_SOC_DAIFMT_DSP_A:</div>
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+ cr1 |= SAI_XCR1_CKSTR;</div>
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frcr |= SAI_XFRCR_FSPOL | SAI_XFRCR_FSOFF;</div>
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break;</div>
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case SND_SOC_DAIFMT_DSP_B:</div>
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+ cr1 |= SAI_XCR1_CKSTR;</div>
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frcr |= SAI_XFRCR_FSPOL;</div>
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break;</div>
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default:</div>
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-- </div>
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2.34.1</div>
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