<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
</head>
<body>
<pre>Hi Linus,
</pre>
<div class="moz-cite-prefix">
<pre>On 12/28/22 00:03, Linus Walleij wrote:</pre>
</div>
<blockquote type="cite"
cite="mid:20221227-ux500-stm32-hash-v1-4-b637ac4cda01@linaro.org">
<pre class="moz-quote-pre" wrap="">This flag enables/disables DMA mode and is a true/false
flag so make it a bool. Clamp the value from the
HASH_HWCFGR register to a bool as well using a double-bang
construction.
Signed-off-by: Linus Walleij <a class="moz-txt-link-rfc2396E" href="mailto:linus.walleij@linaro.org"><linus.walleij@linaro.org></a>
---
drivers/crypto/stm32/stm32-hash.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c b/drivers/crypto/stm32/stm32-hash.c
index cc0a4e413a82..5f03be121787 100644
--- a/drivers/crypto/stm32/stm32-hash.c
+++ b/drivers/crypto/stm32/stm32-hash.c
@@ -166,7 +166,7 @@ struct stm32_hash_dev {
struct reset_control *rst;
void __iomem *io_base;
phys_addr_t phys_base;
- u32 dma_mode;
+ bool dma_mode;</pre>
</blockquote>
<pre>Till now, the value is 0 or 1.
I'm expecting in the future that the value could become greater than 1, it comes from the HW register value where the bitfield is 4 bits.
Bool can simplify for now but will be moved back to u32 once the value will be increased. I'd prefer to keep the dma_mode as u32.
</pre>
<blockquote type="cite"
cite="mid:20221227-ux500-stm32-hash-v1-4-b637ac4cda01@linaro.org">
<pre class="moz-quote-pre" wrap="">
u32 dma_maxburst;
struct ahash_request *req;
@@ -481,7 +481,7 @@ static int stm32_hash_hmac_dma_send(struct stm32_hash_dev *hdev)
struct stm32_hash_ctx *ctx = crypto_ahash_ctx(tfm);
int err;
- if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode == 1)) {
+ if (ctx->keylen < HASH_DMA_THRESHOLD || (hdev->dma_mode)) {
err = stm32_hash_write_key(hdev);
if (stm32_hash_wait_busy(hdev))
return -ETIMEDOUT;
@@ -568,7 +568,7 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)
sg[0] = *tsg;
if (sg_is_last(sg)) {
- if (hdev->dma_mode == 1) {
+ if (hdev->dma_mode) {
len = (ALIGN(sg->length, 16) - 16);
ncp = sg_pcopy_to_buffer(
@@ -602,7 +602,7 @@ static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)
return err;
}
- if (hdev->dma_mode == 1) {
+ if (hdev->dma_mode) {
if (stm32_hash_wait_busy(hdev))
return -ETIMEDOUT;
reg = stm32_hash_read(hdev, HASH_CR);
@@ -663,7 +663,7 @@ static bool stm32_hash_dma_aligned_data(struct ahash_request *req)
return false;
if (sg_nents(req->src) > 1) {
- if (hdev->dma_mode == 1)
+ if (hdev->dma_mode)
return false;
for_each_sg(req->src, sg, sg_nents(req->src), i) {
if ((!IS_ALIGNED(sg->length, sizeof(u32))) &&
@@ -1525,7 +1525,7 @@ static int stm32_hash_probe(struct platform_device *pdev)
if (ret)
goto err_engine_start;
- hdev->dma_mode = stm32_hash_read(hdev, HASH_HWCFGR);
+ hdev->dma_mode = !!stm32_hash_read(hdev, HASH_HWCFGR);
/* Register algos */
ret = stm32_hash_register_algs(hdev);
</pre>
</blockquote>
<br>
<pre>BR,
Lionel</pre>
</body>
</html>